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State: All (80) · In progress (50) · Validation pending (0) · Validation inconclusive (0) · Valid (30) · Invalid (0) · Error (0)
Application: All (80) · Riesel Base (0) · Riesel Base - short (0) · Sierpinski / Riesel Base (0) · Sierpinski / Riesel Base - average (0) · Sierpinski / Riesel Base - average2 (0) · Sierpinski / Riesel Base - average3 (0) · Sierpinski / Riesel Base - long (0) · Sierpinski / Riesel Base - long2 (0) · Sierpinski / Riesel Base - long3 (0) · Sierpinski / Riesel Base - short (0) · Sierpinski Base (0) · Sierpinski Base - short (0) · TF (80)
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Task
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Show names		 Work unit
click for details		 Sent Time reported
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explain 		Status Run time
(sec)		 CPU time
(sec)		 Credit Application
54068609 49048559 21 Apr 2026, 2:33:48 UTC 26 Apr 2026, 8:33:48 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54068685 49048011 21 Apr 2026, 2:33:48 UTC 26 Apr 2026, 8:33:48 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54068358 49048452 21 Apr 2026, 2:25:10 UTC 26 Apr 2026, 8:25:10 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54068273 49048304 21 Apr 2026, 2:08:05 UTC 26 Apr 2026, 8:08:05 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54016365 49048588 21 Apr 2026, 2:08:05 UTC 26 Apr 2026, 8:08:05 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54064657 49046315 20 Apr 2026, 20:11:21 UTC 26 Apr 2026, 2:11:21 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54064658 49046316 20 Apr 2026, 20:11:21 UTC 26 Apr 2026, 2:11:21 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54014127 49046350 20 Apr 2026, 20:11:21 UTC 26 Apr 2026, 2:11:21 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54014142 49046365 20 Apr 2026, 20:11:21 UTC 26 Apr 2026, 2:11:21 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54014144 49046367 20 Apr 2026, 20:11:21 UTC 26 Apr 2026, 2:11:21 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013469 49045692 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013234 49045457 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013490 49045713 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013508 49045731 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013259 49045482 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013540 49045763 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013556 49045779 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013358 49045581 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54013408 49045631 20 Apr 2026, 19:01:14 UTC 26 Apr 2026, 1:01:14 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)
54039619 48519246 19 Apr 2026, 16:02:57 UTC 24 Apr 2026, 22:02:57 UTC In progress --- --- --- TF v0.50 (opencl_intel_gpu_intelarc)

Next 20
State: All (80) · In progress (50) · Validation pending (0) · Validation inconclusive (0) · Valid (30) · Invalid (0) · Error (0)
Application: All (80) · Riesel Base (0) · Riesel Base - short (0) · Sierpinski / Riesel Base (0) · Sierpinski / Riesel Base - average (0) · Sierpinski / Riesel Base - average2 (0) · Sierpinski / Riesel Base - average3 (0) · Sierpinski / Riesel Base - long (0) · Sierpinski / Riesel Base - long2 (0) · Sierpinski / Riesel Base - long3 (0) · Sierpinski / Riesel Base - short (0) · Sierpinski Base (0) · Sierpinski Base - short (0) · TF (80)
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