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State: All (49) · In progress (16) · Validation pending (0) · Validation inconclusive (0) · Valid (33) · Invalid (0) · Error (0)
Application: All (49) · Riesel Base (0) · Riesel Base - short (0) · Sierpinski / Riesel Base (24) · Sierpinski / Riesel Base - average (0) · Sierpinski / Riesel Base - average2 (0) · Sierpinski / Riesel Base - average3 (0) · Sierpinski / Riesel Base - long (0) · Sierpinski / Riesel Base - long2 (0) · Sierpinski / Riesel Base - long3 (0) · Sierpinski / Riesel Base - short (0) · Sierpinski Base (1) · Sierpinski Base - short (0) · TF (24)
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41653789 37880506 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41914207 37880364 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41914246 37879282 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41914247 37879332 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41653907 37880624 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41653909 37880626 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41653910 37880627 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41653912 37880629 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694364 37880655 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41653927 37880644 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694393 37880682 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694398 37880687 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694401 37880690 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694406 37880695 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694407 37880696 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41694426 37880715 7 Dec 2025, 18:45:45 UTC 13 Dec 2025, 0:45:45 UTC In progress --- --- --- TF v0.44 (opencl_intel_gpu_intelarc)
41645507 37872262 7 Dec 2025, 16:24:07 UTC 7 Dec 2025, 17:12:16 UTC Completed and validated 640.96 384.52 6,500.00 TF v0.44 (opencl_intel_gpu_intelarc)
41908472 37870221 7 Dec 2025, 15:44:19 UTC 7 Dec 2025, 16:24:07 UTC Completed and validated 2,370.61 2,324.61 6,500.00 TF v0.44 (opencl_intel_gpu_intelarc)
41638020 37864789 7 Dec 2025, 14:13:50 UTC 7 Dec 2025, 15:44:19 UTC Completed and validated 2,358.15 2,346.91 6,500.00 TF v0.44 (opencl_intel_gpu_intelarc)
41634576 37861363 7 Dec 2025, 13:34:16 UTC 7 Dec 2025, 14:13:50 UTC Completed and validated 2,360.42 2,358.77 6,500.00 TF v0.44 (opencl_intel_gpu_intelarc)

Next 20
State: All (49) · In progress (16) · Validation pending (0) · Validation inconclusive (0) · Valid (33) · Invalid (0) · Error (0)
Application: All (49) · Riesel Base (0) · Riesel Base - short (0) · Sierpinski / Riesel Base (24) · Sierpinski / Riesel Base - average (0) · Sierpinski / Riesel Base - average2 (0) · Sierpinski / Riesel Base - average3 (0) · Sierpinski / Riesel Base - long (0) · Sierpinski / Riesel Base - long2 (0) · Sierpinski / Riesel Base - long3 (0) · Sierpinski / Riesel Base - short (0) · Sierpinski Base (1) · Sierpinski Base - short (0) · TF (24)
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